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 TISP4240F3, TISP4260F3, TISP4290F3, TISP4320F3, TISP4380F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
Copyright (c) 1997, Power Innovations Limited, UK MARCH 1994 - REVISED SEPTEMBER 1997
TELECOMMUNICATION SYSTEM SECONDARY PROTECTION
q
Ion-Implanted Breakdown Region Precise and Stable Voltage Low Voltage Overshoot under Surge
DEVICE `4240F3 `4260F3 `4290F3 `4320F3 `4380F3 VDRM V 180 200 220 240 270 V(BO) V 240 260 290 320 380
D PACKAGE (TOP VIEW)
T T T T
1 2 3 4
8 7 6 5
R R R R
MDXXAI
Specified ratings require the connection of pins 1, 2, 3 and 4 for the T terminal. SL PACKAGE (TOP VIEW)
q
Planar Passivated Junctions Low Off-State Current < 10 A Rated for International Surge Wave Shapes
WAVE SHAPE 2/10 s 8/20 s 10/160 s 10/560 s 0.5/700 s 10/700 s 10/1000 s STANDARD FCC Part 68 ANSI C62.41 FCC Part 68 FCC Part 68 RLM 88 FTZ R12 VDE 0433 CCITT IX K17/K20 REA PE-60 ITSP A 175 120 60 45 38 50 50 50 35 4
T
1
q
R
2
MDXXAH MD4XAA
device symbol
D PACKAGE T 3 T 2 T 1 T 1 SL PACKAGE T
q
Surface Mount and Through-Hole Options
5 PACKAGE Small-outline Small-outline taped and reeled Single-in-line PART # SUFFIX D DR SL Terminals T and R correspond to the alternative line designators of A and B R 6 R 7 R 8 R 2 R
SD4XAE
q
UL Recognized, E132482
description
These high voltage symmetrical transient voltage suppressor devices are designed to protect two wire telecommunication applications against transients caused by lightning strikes and a.c. power lines. Offered in five voltage variants to meet battery and protection requirements they are guaranteed to suppress and withstand the listed international lightning surges in both polarities. Transients are initially clipped by breakdown clamping until the voltage rises to the breakover
level, which causes the device to crowbar. The high crowbar holding current prevents d.c. latchup as the current subsides. These monolithic protection devices are fabricated in ion-implanted planar structures to ensure precise and matched breakover control and are virtually transparent to the system in normal operation The small-outline 8-pin assignment has been carefully chosen for the TISP series to maximise the inter-pin clearance and creepage distances which are used by standards (e.g. IEC950) to establish voltage withstand ratings.
PRODUCT
INFORMATION
Information is current as of publication date. Products conform to specifications in accordance with the terms of Power Innovations standard warranty. Production processing does not necessarily include testing of all parameters.
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TISP4240F3, TISP4260F3, TISP4290F3, TISP4320F3, TISP4380F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
absolute maximum ratings
RATING `4240F3 `4260F3 Repetitive peak off-state voltage (0C < TJ < 70C) `4290F3 `4320F3 `4380F3 Non-repetitive peak on-state pulse current (see Notes 1, 2 and 3) 1/2 s (Gas tube differential transient, open-circuit voltage wave shape 1/2 s) 2/10 s (FCC Part 68, open-circuit voltage wave shape 2/10 s) 8/20 s (ANSI C62.41, open-circuit voltage wave shape 1.2/50 s) 10/160 s (FCC Part 68, open-circuit voltage wave shape 10/160 s) 5/200 s (VDE 0433, open-circuit voltage wave shape 2 kV, 10/700 s) 0.2/310 s (RLM 88, open-circuit voltage wave shape 1.5 kV, 0.5/700 s) 5/310 s (CCITT IX K17/K20, open-circuit voltage wave shape 2 kV, 10/700 s) 5/310 s (FTZ R12, open-circuit voltage wave shape 2 kV, 10/700 s) 10/560 s (FCC Part 68, open-circuit voltage wave shape 10/560 s) 10/1000 s (REA PE-60, open-circuit voltage wave shape 10/1000 s) Non-repetitive peak on-state current (see Notes 2 and 3) 50 Hz, 1s Initial rate of rise of on-state current, Junction temperature Storage temperature range D Package SL Package Linear current ramp, Maximum ramp value < 38 A ITSM diT/dt TJ Tstg ITSP 350 175 120 60 50 38 50 50 45 35 4 6 250 -40 to +150 -40 to +150 A rms A/s C C A VDRM SYMBOL VALUE 180 200 220 240 270 V UNIT
NOTES: 1. Further details on surge wave shapes are contained in the Applications Information section. 2. Initially the TISP must be in thermal equilibrium with 0C < TJ <70C. The surge may be repeated after the TISP returns to its initial conditions. 3. Above 70C, derate linearly to zero at 150C lead temperature.
electrical characteristics for the T and R terminals, TJ = 25C
TISP4240F3 PARAMETER Repetitive peak offstate current Breakover voltage age Breakover current On-state voltage Holding current Critical rate of rise of off-state voltage Off-state current Off-state capacitance TEST CONDITIONS MIN TYP MAX 10 240 267 0.15 0.15 5 10 Vd = 100 mV VD = 0, VD = -5 V VD = -50 V 57 26 11 95 45 20 57 26 11 0.6 3 0.15 5 10 95 45 20 0.15 287 0.6 3 MIN TISP4260F3 TYP MAX 10 260 UNIT
IDRM V(BO) V(BO) I(BO) VT IH dv/dt ID Coff NOTE
VD = VDRM , 0C < TJ < 70C dv/dt = 250 V/ms, RSOURCE = 300 RSOURCE = 50 , di/dt < 20 A/s dv/dt = 250 V/ms, RSOURCE = 300 IT = 5 A, tW = 100 s di/dt = +/-30 mA/ms Linear voltage ramp Maximum ramp value < 0.85V(BR)MIN VD = 50 V f = 100 kHz, (see Note 4)
A V V A V A kV/s A pF pF pF
Impulse breakover volt- dv/dt = 1000 V/s,
4: Further details on capacitance are given in the Applications Information section.
PRODUCT
INFORMATION
2
TISP4240F3, TISP4260F3, TISP4290F3, TISP4320F3, TISP4380F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
electrical characteristics for the T and R terminals, TJ = 25C
TISP4290F3 PARAMETER Repetitive peak offstate current Breakover voltage age Breakover current On-state voltage Holding current Critical rate of rise of off-state voltage Off-state current Off-state capacitance TEST CONDITIONS MIN TYP MAX 10 290 317 0.15 0.15 5 10 Vd = 100 mV VD = 0, VD = -5 V VD = -50 V 57 26 11 95 45 20 57 26 11 0.6 3 0.15 5 10 95 45 20 kV/s A pF pF pF 0.15 347 0.6 3 MIN TISP4320F3 TYP MAX 10 320 UNIT
IDRM V(BO) V(BO) I(BO) VT IH dv/dt ID Coff NOTE
VD = VDRM, 0C < TJ < 70C dv/dt = 250 V/ms, di/dt < 20 A/s dv/dt = 250 V/ms, di/dt = +/-30 mA/ms Linear voltage ramp Maximum ramp value < 0.85V(BR)MIN VD = 50 V f = 100 kHz, (see Note 5) RSOURCE = 300 IT = 5 A, tW = 100 s RSOURCE = 300
A V V A V
Impulse breakover volt- dv/dt = 1000 V/s, RSOURCE = 50 ,
5: Further details on capacitance are given in the Applications Information section.
electrical characteristics for the T and R terminals, TJ = 25C
PARAMETER IDRM V(BO) V(BO) I(BO) VT IH dv/dt ID Coff NOTE Repetitive peak offstate current Breakover voltage age Breakover current On-state voltage Holding current Critical rate of rise of off-state voltage Off-state current Off-state capacitance TEST CONDITIONS VD = VDRM, 0C < TJ < 70C dv/dt = 250 V/ms, di/dt < 20 A/s dv/dt = 250 V/ms, di/dt = +/-30 mA/ms Linear voltage ramp Maximum ramp value < 0.85V(BR)MIN VD = 50 V f = 100 kHz, (see Note 6) Vd = 100 mV VD = 0, VD = -5 V VD = -50 V 57 26 11 RSOURCE = 300 0.15 0.15 5 10 95 45 20 IT = 5 A, tW = 100 s RSOURCE = 300 407 0.6 3 TISP4380F3 MIN TYP MAX 10 380 UNIT A V V A V A kV/s A pF pF pF
Impulse breakover volt- dv/dt = 1000 V/s, RSOURCE = 50 ,
6: Further details on capacitance are given in the Applications Information section.
thermal characteristics
PARAMETER RJA Junction to free air thermal resistance TEST CONDITIONS Ptot = 0.8 W, TA = 25C 5 cm2, FR4 PCB D Package SL Package MIN TYP MAX 160 105 UNIT C/W
PRODUCT
INFORMATION
3
TISP4240F3, TISP4260F3, TISP4290F3, TISP4320F3, TISP4380F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
PARAMETER MEASUREMENT INFORMATION
+i ITSP Quadrant I Switching Characteristic
ITSM IT VT IH V(BR)M -v I(BR) V(BR) I(BO) VDRM IDRM IH VD ID ID VD VDRM V(BR)M IDRM V(BR) I(BR) +v
V(BO)
I(BO)
V(BO)
VT IT ITSM
Quadrant III Switching Characteristic ITSP -i
PMXXAA
Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR T AND R TERMINALS ALL MEASUREMENTS ARE REFERENCED TO THE R TERMINAL
PRODUCT
INFORMATION
4
TISP4240F3, TISP4260F3, TISP4290F3, TISP4320F3, TISP4380F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
TYPICAL CHARACTERISTICS R and T terminals
OFF-STATE CURRENT vs JUNCTION TEMPERATURE
100
TC3HAF
NORMALISED BREAKDOWN VOLTAGES vs JUNCTION TEMPERATURE
TC3HAI
1.2 10 ID - Off-State Current - A Normalised Breakdown Voltages
V(BO)
1 VD = 50 V 0*1 VD = -50 V
1.1
V(BR)M
1.0 V(BR) Normalised to V(BR) I(BR) = 100 A and 25C Positive Polarity
0*01
0*001 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C
0.9 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C
Figure 2.
Figure 3.
NORMALISED BREAKDOWN VOLTAGES vs JUNCTION TEMPERATURE
TC3HAJ
ON-STATE CURRENT vs ON-STATE VOLTAGE
100
TC3HAL
1.2 Normalised Breakdown Voltages IT - On-State Current - A V(BO)
1.1
V(BR)M
10
1.0 V(BR) Normalised to V(BR) I(BR) = 100 A and 25C Negative Polarity 0.9 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C
150C
25C -40C
1 1 2 3 4 5 6 7 8 9 10 VT - On-State Voltage - V
Figure 4.
Figure 5.
PRODUCT
INFORMATION
5
TISP4240F3, TISP4260F3, TISP4290F3, TISP4320F3, TISP4380F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
TYPICAL CHARACTERISTICS R and T terminals
HOLDING CURRENT & BREAKOVER CURRENT vs JUNCTION TEMPERATURE
IH, I(BO) - Holding Current, Breakover Current - A 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 IH 0.2 I(BO)
TC3HAH
NORMALISED BREAKOVER VOLTAGE vs RATE OF RISE OF PRINCIPLE CURRENT
1.3
TC3HAB
Normalised Breakover Voltage
1.2
1.1 Positive
0.1 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C
Negative 1.0 0*001 0*01 0*1 1 10 100
di/dt - Rate of Rise of Principle Current - A/s
Figure 6.
Figure 7.
OFF-STATE CAPACITANCE vs TERMINAL VOLTAGE
100
TC3HAE
OFF-STATE CAPACITANCE vs JUNCTION TEMPERATURE
500
TC3HAD
Off-State Capacitance - pF
Off-State Capacitance - pF
100
Positive Bias
Terminal Bias = 0 Terminal Bias = 50 V 10
Negative Bias
Terminal Bias = -50 V
10 0*1
1 1 Terminal Voltage - V 10 50 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C
Figure 8.
Figure 9.
PRODUCT
INFORMATION
6
TISP4240F3, TISP4260F3, TISP4290F3, TISP4320F3, TISP4380F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
TYPICAL CHARACTERISTICS R and T terminals
SURGE CURRENT vs DECAY TIME
1000
TC3HAA
Maximum Surge Current - A
100
10 2 10 100 Decay Time - s 1000
Figure 10.
THERMAL INFORMATION
MAXIMUM NON-RECURRING 50 Hz CURRENT vs CURRENT DURATION
TI4HAA
THERMAL RESPONSE
TI3MAC
ITRMS - Maximum Non-Recurrent 50 Hz Current - A
Z J - Transient Thermal Impedance - C/W
VGEN = 350 Vrms RGEN = 20 to 250 10 SL Package
100
D Package
10
SL Package
D Package 1 0*1
1
10
100
1000
1 0*0001 0*001
0*01
0*1
1
10
100
1000
t - Current Duration - s
t - Power Pulse Duration - s
Figure 11.
Figure 12.
PRODUCT
INFORMATION
7
TISP4240F3, TISP4260F3, TISP4290F3, TISP4320F3, TISP4380F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
APPLICATIONS INFORMATION
electrical characteristics
The electrical characteristics of a TISP are strongly dependent on junction temperature, TJ. Hence a characteristic value will depend on the junction temperature at the instant of measurement. The values given in this data sheet were measured on commercial testers, which generally minimise the temperature rise caused by testing. Application values may be calculated from the parameters' temperature curves, the power dissipated and the thermal response curve (Z ).
lightning surge
wave shape notation Most lightning tests, used for equipment verification, specify a unidirectional sawtooth waveform which has an exponential rise and an exponential decay. Wave shapes are classified in terms of peak amplitude (voltage or current), rise time and a decay time to 50% of the maximum amplitude. The notation used for the wave shape is amplitude, rise time/decay time. A 50A, 5/310 s wave shape would have a peak current value of 50 A, a rise time of 5 s and a decay time of 310 s. The TISP surge current graph comprehends the wave shapes of commonly used surges. generators There are three categories of surge generator type, single wave shape, combination wave shape and circuit defined. Single wave shape generators have essentially the same wave shape for the open circuit voltage and short circuit current (e.g. 10/1000 s open circuit voltage and short circuit current). Combination generators have two wave shapes, one for the open circuit voltage and the other for the short circuit current (e.g. 1.2/50 s open circuit voltage and 8/20 s short circuit current) Circuit specified generators usually equate to a combination generator, although typically only the open circuit voltage waveshape is referenced (e.g. a 10/700 s open circuit voltage generator typically produces a 5/310 s short circuit current). If the combination or circuit defined generators operate into a finite resistance the wave shape produced is intermediate between the open circuit and short circuit values. current rating When the TISP switches into the on-state it has a very low impedance. As a result, although the surge wave shape may be defined in terms of open circuit voltage, it is the current wave shape that must be used to assess the required TISP surge capability. As an example, the CCITT IX K17 1.5 kV, 10/700 s surge is changed to a 38 A, 5/310 s waveshape when driving into a short circuit. Thus the TISP surge current capability, when directly connected to the generator, will be found for the CCITT IX K17 waveform at 310 s on the surge graph and not 700 s. Some common short circuit equivalents are tabulated below: STANDARD OPEN CIRCUIT VOLTAGE 1.5 kV, 10/700 s 1 kV, 10/700 s 1.5 kV, 0.5/700 s 2.0 kV, 10/700 s 2.0 kV, 10/700 s SHORT CIRCUIT CURRENT 38 A, 5/310 s 25 A, 5/310 s 38 A, 0.2/310 s 50 A, 5/200 s 50 A, 5/310 s
CCITT IX K17 CCITT IX K20 RLM88 VDE 0433 FTZ R12
Any series resistance in the protected equipment will reduce the peak circuit current to less than the generators' short circuit value. A 2 kV open circuit voltage, 50 A short circuit current generator has an effective output impedance of 40 (2000/50). If the equipment has a series resistance of 25 then the surge current requirement of the TISP becomes 31 A (2000/65) and not 50 A.
PRODUCT
INFORMATION
8
TISP4240F3, TISP4260F3, TISP4290F3, TISP4320F3, TISP4380F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
APPLICATIONS INFORMATION
protection voltage
The protection voltage, (V(BO) ), increases under lightning surge conditions due to thyristor regeneration. This increase is dependent on the rate of current rise, di/dt, when the TISP is clamping the voltage in its breakdown region. The V(BO) value under surge conditions can be estimated by multiplying the 50 Hz rate V(BO) (250 V/ms) value by the normalised increase at the surge's di/dt (Figure 7.) . An estimate of the di/dt can be made from the surge generator voltage rate of rise, dv/dt, and the circuit resistance.
As an example, the CCITT IX K17 1.5 kV, 10/700 s surge has an average dv/dt of 150 V/s, but, as the rise is exponential, the initial dv/dt is higher, being in the region of 450 V/s. The instantaneous generator output resistance is 25 . If the equipment has an additional series resistance of 20 , the total series resistance becomes 45 . The maximum di/dt then can be estimated as 450/45 = 10 A/s. In practice the measured di/dt and protection voltage increase will be lower due to inductive effects and the finite slope resistance of the TISP breakdown region.
capacitance
off-state capacitance
The off-state capacitance of a TISP is sensitive to junction temperature, TJ , and the bias voltage, comprising of the dc voltage, VD , and the ac voltage, Vd . All the capacitance values in this data sheet are measured with an ac voltage of 100 mV. The typical 25C variation of capacitance value with ac bias is shown in Figure 13 When VD >> Vd the capacitance value is independent on the value of Vd . The capacitance is essentially constant over the range of normal telecommunication frequencies.
NORMALISED CAPACITANCE vs RMS AC TEST VOLTAGE
1.05
AIXXAA
1.00 Normalised Capacitance
0.95
0.90
0.85
0.80 Normalised to Vd = 100 mV DC Bias, VD = 0 0.70 1 10 100 1000 Vd - RMS AC Test Voltage - mV
0.75
Figure 13.
PRODUCT
INFORMATION
9
TISP4240F3, TISP4260F3, TISP4290F3, TISP4320F3, TISP4380F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
MECHANICAL DATA
D008 plastic small-outline package
This small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly.
D008 5,00 (0.197) 4,80 (0.189) 8 7 6 5 Designation per JEDEC Std 30: PDSO-G8
6,20 (0.244) 5,80 (0.228)
4,00 (0.157) 3,81 (0.150)
1
2
3
4
1,75 (0.069) 1,35 (0.053)
7 NOM 3 Places
0,50 (0.020) x 45NOM 0,25 (0.010)
5,21 (0.205) 4,60 (0.181)
0,203 (0.008) 0,102 (0.004) 0,79 (0.031) 0,28 (0.011) Pin Spacing 1,27 (0.050) (see Note A) 6 Places
0,51 (0.020) 0,36 (0.014) 8 Places 0,229 (0.0090) 0,190 (0.0075)
7 NOM 4 Places
4 4
1,12 (0.044) 0,51 (0.020)
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
MDXXAA
NOTES: A. B. C. D.
Leads are within 0,25 (0.010) radius of true position at maximum material condition. Body dimensions do not include mold flash or protrusion. Mold flash or protrusion shall not exceed 0,15 (0.006). Lead tips to be planar within 0,051 (0.002).
PRODUCT
INFORMATION
10
TISP4240F3, TISP4260F3, TISP4290F3, TISP4320F3, TISP4380F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
MECHANICAL DATA
SL002 2-pin plastic single-in-line package
This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly.
SL002 10,2 (0.400) MAX 4,57 (0.180) MAX
8,31 (0.327) MAX Index Dot 12,9 (0.492) MAX
6,60 (0.260) 6,10 (0.240)
4,267 (0.168) MIN
0,711 (0.028) 0,559 (0.022) 2 Places
1
2 1,500 (0.059) MAX 2 Places 5,08 (0.200) T.P. (see Note A) 0,356 (0.014) 0,203 (0.008) 2 Places
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES NOTES: A. Each pin centerline is located within 0,25 (0.010) of its true longitudinal position. B. Body molding flash of up to 0,15 (0.006) may occur in the package lead plane.
MDXXAC
PRODUCT
INFORMATION
11
TISP4240F3, TISP4260F3, TISP4290F3, TISP4320F3, TISP4380F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
MECHANICAL DATA
D008 tape dimensions
D008 Package (8 pin SOIC) Single-Sprocket Tape
4,10 3,90 8,05 7,95 2,05 1,95
1,60 1,50 0,40 0,8 MIN.
5,55 5,45
12,30 11,70
6,50 6,30 Carrier Tape Embossment
o 1,5 MIN.
0 MIN. Direction of Feed 2,2 2,0
Cover Tape
ALL LINEAR DIMENSIONS IN MILLIMETERS
NOTES: A. Taped devices are supplied on a reel of the following dimensions:Reel diameter: Reel hub diameter: Reel axial hole: B. 2500 devices are on a reel. 330 +0,0/-4,0 mm 100 2,0 mm 13,0 0,2 mm
MDXXAT
PRODUCT
INFORMATION
12
TISP4240F3, TISP4260F3, TISP4290F3, TISP4320F3, TISP4380F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
IMPORTANT NOTICE
Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is current. PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except as mandated by government requirements. PI accepts no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor is any license, either express or implied, granted under any patent right, copyright, design right, or other intellectual property right of PI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS.
Copyright (c) 1997, Power Innovations Limited
PRODUCT
INFORMATION
13


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